This invention relates to lithography systems and monitoring components in lithography systems using interferometers.
Lithography systems are commonly used in fabricating large-scale integrated circuits such as computer chips and the like. The function of a lithography system is to direct spatially patterned radiation onto a photoresist-coated wafer. The process involves detennining which location of the wafer is to receive the radiation (alignment) and applying the radiation to the photoresist at that location (exposure).
In general, a lithography system, also referred to as a lithography tool, an exposure system or an exposure tool, typically includes an illumination system and a wafer positioning system. The illumination system includes a radiation source for providing radiation such as ultraviolet, visible, x-ray, electron, or ion radiation, and a reticle or mask for imparting the pattern to the radiation, thereby generating the spatially patterned radiation. In addition, for the case of reduction lithography, the illumination system can include a lens assembly for imaging the spatially patterned radiation onto the wafer. The imaged radiation exposes resist coated onto the wafer. The illumination system also includes a mask stage for supporting the mask and a positioning system for adjusting the position of the mask stage relative to the radiation directed through the mask. The wafer positioning system includes a wafer stage for supporting the wafer and wafer chuck and a positioning system for adjusting the position of the wafer stage relative to the imaged radiation. Fabrication of integrated circuits can include multiple exposing steps. For a general reference on lithography, see, for example, J. R. Sheats and B. W. Smith, in Microlithography: Science and Technology (Marcel Dekker, Inc., New York, 1998), the contents of which is incorporated herein by reference.
During exposure, the radiation source illuminates the patterned reticle, which scatters the radiation to produce the spatially patterned radiation. The reticle is also referred to as a mask, and these terms are used interchangeably below. In the case of reduction lithography, a reduction lens collects the scattered radiation and forms a reduced image of the reticle pattern. Alternatively, in the case of proximity printing, the scattered radiation propagates a small distance (typically on the order of microns) before contacting the wafer to produce a 1:1 image of the reticle pattern. The radiation initiates photo-chemical processes in the resist that convert the radiation pattern into a latent image within the resist.
Interferometry systems are typically important components of the positioning mechanisms that control the positions of the wafer and reticle and register the reticle image on the wafer. Interferometry systems can be used to precisely measure the positions of each of the wafer stage and mask stage relative to other components of the exposure system, such as the lens assembly, radiation source or support structure. In such cases, the interferometry system can be attached to a stationary structure and the measurement object attached to a movable element such as one of the mask and wafer stages. Alternatively, the situation can be reversed, with the interferometry system attached to a movable object and the measurement object attached to a stationary object.
More generally, such interferometry systems can be used to measure the position of any one component of the exposure system relative to any other component of the exposure system, in which the interferometry system is attached to, or supported by, one of the components and the measurement object is attached, or is supported by the other of the components.
To properly position the wafer, the wafer includes alignment marks on the wafer surface that can be measured by dedicated sensors. Alternatively, or additionally, alignment marks can be included on the surface of the stage. The measured positions of the alignment marks define the location of the wafer within the tool. This information, along with a specification of the desired patterning of the wafer surface, guides the alignment of the wafer relative to the spatially patterned radiation. Based on such information, the translatable stage supporting the photoresist-coated wafer moves the wafer such that the radiation will expose the correct location of the wafer.
Overlay improvement is one of the five most difficult challenges down to and below 100 nm line widths (design rules), see for example the Semiconductor Industry Roadmap, p. 82 (1997). Overlay depends directly on the performance, i.e. accuracy and precision, of the distance measuring interferometers used to position the wafer and reticle (or mask) stages. Since a lithography tool may produce $50-100 M/year of product, the economic value from improved performance distance measuring interferometers is substantial. Each 1% increase in yield of the lithography tool results in approximately $1 M/year economic benefit to the integrated circuit manufacturer and substantial competitive advantage to the lithography tool vendor.
Furthermore, lithography tool throughput is also affected by the time it takes for a tool to execute alignment procedures. In a multiple stage lithography tool, for example, time is required for executing alignment procedures at both the load/unload and exposure positions of the multiple stage positions. The time for unloading a first wafer, loading a second wafer, and performing alignment procedures for the second wafer at the load/unload position can by design be less than the time for alignment procedures and exposure of a third wafer at the exposure position. Accordingly, the time for alignment procedures at the exposure position is not necessarily eliminated by the use of a multiple stage lithography tool and can therefore affect throughput of the multiple stage lithography tool. For multiple stage lithography tools where loaded wafer chucks are exchanged between the exposure and load/unload locations and the alignment of a wafer with respect to a corresponding wafer chuck is determined at the load/unload location, the time required to align the loaded wafer chuck wafer relative to the stage at the exposure location can affect throughput.